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Product design for manufacturing (DFM) considerations

Hardware

PCB includes stainless steel to prevent rusting, repel solder
Tinned, plastic encapsulated microcircuits, etc…will solder to board
Phillips or allen-head screws for ease of assembly
Silpad washers on power devices where required
Identify rivscrew use, where possible
Non-plated mounting holes, without pads, where/if possible

Board mechanicals

Three (3) fiducial marks 0.060″ on each side with SMT via-holes covered with soldermask (normal strategy except for certain ICT-enabled designs)
Layer stack-up identification on board or break-off tabs
Component-to-edge-of-board considerations identified
Panelization or break-offs discussed with ODM or contract manufacturing partners

Printed circuit board specifications

Optimum board finish specified (e.g., gold flash for boards with fine ball grid array (FBGA) or QFPs 0.020″ pitch and smaller)
Boards specified for Bare-Board Test (BBT)
Gerber files generated in proper format format (with embedded aperture lists) (some formats include various high-level commands/controls that allow the Gerber data creator to precisely specify the photoplot)
No soldermask between 0.020″, or smaller, fine-pitch
Controlled impedance specified where required
Special board materials, construction specified for high-frequency boards
Liquid photo-imageable soldermask, standard
SMT paste layer(s) with no fiducial or other pads

Test strategy

Test plan established before design is started
Failure modes considered
Identify self-test, manual functional test, all boundary-scan board test, automated functional test, in-circuit/combinational test (ICT)
Avoid test turrets and hooks (use SMT loops if required)

In-circuit test (ICT) – partial checklist

Enablers for integrated circuits (IC) and oscillators – with resistor pull-downs
Test pads for unused IC pins for complex ICs
Boundary scan enabled devices (note chaining, layout requirements)
One test pad per net – accessible from bottom side
Additional pads for power nets
Minimum test pad is 0.030″ (check with ODM or contract manufacturer – sometimes 0.040″ square preferred)
Okay to use through-hole leads as test points
Two (2) tooling holes required: diagonally opposite, minimum 0.093″, 0.125″ (non-plated preferred)
Use of 0.050″ and 0.075″ center-center test points minimized or eliminated
Pads with via-holes used as test points have no soldermask covering them, other vias masked
ICT tooling hole to test pad clearance 0.125″
Board edge to test pad clearance 0.100″
On-board batteries have disconnect jumper

VentureOutsource.com, January 2004

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Publication Date: December 17, 2006

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Product design for manufacturing considerations can culminate into an exhausting list of items depending on the electronics product and product requirements. Taking measures to consider as many aspects of a product's design requirements as early as possible during the product development phase can help companies save time and money. Contract manufacturers with experience in product design can be an OEM's best source for helping to put together a checklist of product design considerations. Below are some items broken out by activity, or process, companies should consider. Design, component selection

Verify components are available in production quantities
Minimize number, and number of, different components
Confirm no end-of-life (EOL) components designed in
Minimize sole-source devices, components
Multiple, alternative manufacturers specified for all components
Second sources checked for mechanical and electrical fit
Component tolerance issues identified and evaluated
Component temperature ranges considered
BGA vs fine-pitch QFP considerations
Trim pots eliminated where possible
Design for environment: for recycle, re-use, repair

General board layout considerations

Visible orientation marks on silkscreen layer for all polarized components
Polarized components in proper directions
Layer numbers visible on PCB or break-offs
Names on artwork

Board assembly manufacturing processes

Workmanship requirements established (e.g., IPC, military, aerospace)
Number of processes identified and minimized
Hand soldering minimized
Hand insertion and assembly minimized

Through-hole components

Non-plated tooling holes for through-hole automation
Drill sizes: lead diameter + X for auto-inserted through-hole (may suggest size of ‘finished hole' instead so design house can determine which size drill to use to allow for plate up)
Dual in-line package (DIP), axial and radial inserted components (note some exceptions on non-plated, single-sided boards)
Customary for DIP socket drill holes to be 0.040"
Orientation of auto-insert components at 0°, 90°, 180°, and 270°
DIP components oriented same way on volume boards
Axial components oriented same way on volume boards
Transistor lead layouts spaced properly, in-line, pad-to-pad
No stand-up axial components
Minimum annular rings on through-hole pads

SMT land patterns

Fine-pitch land patterns at 60% pad width/pitch
Land patterns match to actual physical components
Use of land patterns fall in with DFM optimization
No natural bridges on fine-pitch SMT
Non-solder mask defined pads for BGAs

Wave-soldered bottom side SMT components

Confirm lower-yielding process required
Bottom-side SMT wave land patterns optimized
Component orientation optimized for waved SMT components
4-sided SMT and fine-pitch SMT not soldered
Minimum component-to-component spacing equal to height of tallest of two components
Other wave solder shadowing considerations to prevent ‘skips' (solder surface tension does not break when waving, therefore solder cannot properly wet the interface to form a solder joint)
No SMT components on bottom within clinch head footprint on mixed-technology PCBs

Hardware

PCB includes stainless steel to prevent rusting, repel solder
Tinned, plastic encapsulated microcircuits, etc...will solder to board
Phillips or allen-head screws for ease of assembly
Silpad washers on power devices where required
Identify rivscrew use, where possible
Non-plated mounting holes, without pads, where/if possible

Board mechanicals

Three (3) fiducial marks 0.060" on each side with SMT via-holes covered with soldermask (normal strategy except for certain ICT-enabled designs)
Layer stack-up identification on board or break-off tabs
Component-to-edge-of-board considerations identified
Panelization or break-offs discussed with ODM or contract manufacturing partners

Printed circuit board specifications

Optimum board finish specified (e.g., gold flash for boards with fine ball grid array (FBGA) or QFPs 0.020" pitch and smaller)
Boards specified for Bare-Board Test (BBT)
Gerber files generated in proper format format (with embedded aperture lists) (some formats include various high-level commands/controls that allow the Gerber data creator to precisely specify the photoplot)
No soldermask between 0.020", or smaller, fine-pitch
Controlled impedance specified where required
Special board materials, construction specified for high-frequency boards
Liquid photo-imageable soldermask, standard
SMT paste layer(s) with no fiducial or other pads

Test strategy

Test plan established before design is started
Failure modes considered
Identify self-test, manual functional test, all boundary-scan board test, automated functional test, in-circuit/combinational test (ICT)
Avoid test turrets and hooks (use SMT loops if required)

In-circuit test (ICT) - partial checklist

Enablers for integrated circuits (IC) and oscillators - with resistor pull-downs
Test pads for unused IC pins for complex ICs
Boundary scan enabled devices (note chaining, layout requirements)
One test pad per net - accessible from bottom side
Additional pads for power nets
Minimum test pad is 0.030" (check with ODM or contract manufacturer - sometimes 0.040" square preferred)
Okay to use through-hole leads as test points
Two (2) tooling holes required: diagonally opposite, minimum 0.093", 0.125" (non-plated preferred)
Use of 0.050" and 0.075" center-center test points minimized or eliminated
Pads with via-holes used as test points have no soldermask covering them, other vias masked
ICT tooling hole to test pad clearance 0.125"
Board edge to test pad clearance 0.100"
On-board batteries have disconnect jumper